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True open hardware: Opencores and OpenRISC

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True open hardware: Opencores and OpenRISC
FOSDEM 2012

This presentation will be delivered in two sections, first an introduction to the OpenRISC project by Julius Baxter, followed by a look at embedded hardware development with Open Source IP cores using the OpenRISC platform and the IP available on OpenCores.org with Olof Kindgren. The OpenRISC Project: This project is aimed at developing embedded RISC microprocessor architectures and open source RTL implementations. Since its beginning in 1999, the project has attracted anyone interested in CPU development and covers everything from ISA definition to RTL description writing and testing to simulator, tool chain and operating system porting. The presentation will cover the motivation, recent progress and future plans of the project. Open Source Embedded Hardware Development: Most Open Source embedded developers end their quest for a fully Open Source system when they get the data sheets. For the FPGA/ASIC developers at OpenCores, this is where the fun part begins. Instead of relying on the kindness of the chip manufacturers to deliver the desired SoC functionality, Open Source hardware developers simply design their own with the standard peripherals and custom hardware acceleration that of choice. This requires Open Source IP cores and a framework to put it all together. This presentation will contain an introduction to some of the benefits of open source hardware and an overview of OpenCores. The main focus will be on how to use the OpenRISC Reference Platform System on Chip (ORPSoC) to build a custom SoC, which will be demonstrated on the OpenRISC FPGA development board.

Speakers: Julius Baxter Olof Kindgren