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Digital mixed-language simulators

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Digital mixed-language simulators
FOSDEM 2016

Nowadays there are many open source tools that are able to simulate either VHDL or (System)Verilog but none of them has the goal to address the problem of a mixed language simulation, that is, a simulation that involves more than one language at a time. In fact, people can not use multiple hardware-description languages in a design unless they rely on a proprietary solution.

After an introduction about compilers and simulators, the focus will move to review potential problems and solutions for the design and the implementation of an event-based digital mixed-language simulator.

Speakers: Michele Castellana