Back at the beginning of home computers, volatile memory was a rather easy problem to solve in the computer architecture, but with the computers getting faster and multiple cores, it has become a surprisingly tricky problem for processor and chipset designers to solve. This talk tries to shed some light on the difficulties of implementing high-performance memory subsystems and how solutions to those difficulties affect the design of RAM, memory controllers, cache subsystems and even the microarchitecture of the processor cores.
Speakers: Felix Held