David Wentzlaff

As contemporary industrial ASIC designs have reached hundreds of billions transistor count, EDA tools must have the scalability to handle such large designs. However, few open-source RTL designs reflect the scale that industrial ASICs have reached. In this talk, we will present OpenPiton, a scalable, tiled manycore design that can reach as many as 65,536 cores in a single chip, and up to 500 million cores on a multi-chip design. The modularity and scalability of the OpenPiton design can enable EDA tool developers to test their tools' functionality at contemporary scales and adapt their development for future larger designs. With its many configurability options, extensive scalability, and heterogeneity, the OpenPiton platform is well placed to supercharge open-source EDA tool development and pave the way for a completely open-source ASIC synthesis and back-end flow tested using open-source designs.

Title: OpenPiton: An Open-Source Framework for EDA Tool Development

Abstract: As contemporary industrial ASIC designs have reached hundreds of billions transistor count, EDA tools must have the scalability to handle such large designs. However, few open-source RTL designs reflect the scale that industrial ASICs have reached. In this talk, we will present OpenPiton, a scalable, tiled manycore design that can reach as many as 65,536 cores in a single chip, and up to 500 million cores on a multi-chip design. The modularity and scalability of the OpenPiton design can enable EDA tool developers to test their tools' functionality at contemporary scales and adapt their development for future larger designs. With its many configurability options, extensive scalability, and heterogeneity, the OpenPiton platform is well placed to supercharge open-source EDA tool development and pave the way for a completely open-source ASIC synthesis and back-end flow tested using open-source designs.

Preferred Session length: Short (20 minutes)

Speaker: Prof. David Wentzlaff (Princeton University)

Speaker bio: David Wentzlaff is an associate professor of electrical engineering at Princeton University. Wentzlaff's research has earned several awards, among them an NSF CAREER award, DARPA Young Faculty Award, AFOSR Young Investigator Prize, induction into the MICRO Hall of Fame, and the ASPLOS WACI Test-of-Time Award. He received his M.S. and Ph.D. from MIT and received a B.S. in electrical engineering from the University of Illinois at Urbana-Champaign. He was Lead Architect and Founder of Tilera Corporation, a multicore chip manufacturer now owned by Mellanox. David's current research interests include how to create manycore microprocessors customized specifically for Cloud computing environments, how to design computer architectures in a post Moore’s Law world, and how to reduce the impact of computing on the environment by optimizing computer architecture for fully biodegradable substrates. Many of the research projects created by Wentzlaff’s group have been open-sourced including the PriME simulator, OpenPiton, and PRGA.

Link to any hardware / code / slides for the talk: https://parallel.princeton.edu/openpiton/ https://github.com/PrincetonUniversity/openpiton

RISC-V application, OS, and firmware development has been slowed by the lack of "real hardware" available for developers to work with. With the rise of FPGAs in the cloud and the recent release of the OpenPiton+Ariane manycore platform on Amazon's F1 cloud FPGA platform, we propose using 1-12 core OpenPiton+Ariane processors emulated on F1 to develop RISC-V software and firmware. In this talk, we will give an accelerated tutorial on how to get started with OpenPiton+Ariane, the spec-compliant RISC-V platform it offers, and how the firmware and OS can be modified and run on top. We will show a number of applications built and running for our present Debian distribution and the software development environment that this offers. We will then highlight how hardware and software can be co-designed on OpenPiton+Ariane with the ability to recompile the hardware underlying the cloud FPGA image and deploy it for use by others. This platform is serving as a basis for software and hardware development for the DECADES project, a project investigating heterogenous manycore and hardware accelerator based designs with support for orchestrated data movement.

RISC-V Software and Firmware Development in the Cloud Using OpenPiton+Ariane on Amazon F1

RISC-V application, OS, and firmware development has been slowed by the lack of "real hardware" available for developers to work with. With the rise of FPGAs in the cloud and the recent release of the OpenPiton+Ariane manycore platform on Amazon's F1 cloud FPGA platform, we propose using 1-12 core OpenPiton+Ariane processors emulated on F1 to develop RISC-V software and firmware. In this talk, we will give an accelerated tutorial on how to get started with OpenPiton+Ariane, the spec-compliant RISC-V platform it offers, and how the firmware and OS can be modified and run on top. We will show a number of applications built and running for our present Debian distribution and the software development environment that this offers. We will then highlight how hardware and software can be co-designed on OpenPiton+Ariane with the ability to recompile the hardware underlying the cloud FPGA image and deploy it for use by others. This platform is serving as a basis for software and hardware development for the DECADES project, a project investigating heterogenous manycore and hardware accelerator based designs with support for orchestrated data movement.

http://openpiton.org https://openpiton-blog.princeton.edu/2019/10/bringing-openpiton-to-amazon-ec2-f1-fpgas/

OpenPiton+Ariane contributors include: Jonathan Balkind, Grigory Chirkov, Yaosheng Fu, Adi Fuchs, Fei Gao, Alexey Lavrov, Ang Li, Xiaohua Liang, Katie Lim, Matthew Matl, Michael McKeown, Tri Nguyen, Samuel Payne, Michael Schaffner, Mohammad Shahrad, Jinzheng Tu, Florian Zaruba, Yanqi Zhou, Georgios Tziantzioulis, Luca Benini, David Wentzlaff

DECADES is a large collaboration from three academic groups: Margaret Martonosi (PI Princeton), David Wentzlaff (PI Princeton), Luca Carloni (PI Columbia) with students/researchers: Jonathan Balkind, Ting-Jung Chang, Fei Gao, Davide Giri, Paul Jackson, Paolo Mantovani, Luwa Matthews, Aninda Manocha, Tyler Sorensen, Jinzheng Tu, Esin Türeci, Georgios Tziantzioulis, and Marcelo Orenes Vera. In addition to the submission author, portions of the talk may be offered by others in the collaboration.