TITLE: HPVM: Extending LLVM For Compiling to Heterogeneous Parallel Systems
SPEAKER: Vikram Adve, University of Illinois at Urbana-Champaign
Abstract:
We will present a detailed description of HPVM, an extension to LLVM for
compiling to heterogeneous parallel systems. HPVM aims to make it much
easier to develop compilers for diverse parallel hardware, and to implement
parallel languages (including domain-specific languages) for such hardware.
We will briefly describe at a high-level the key parallel abstraction of
hierarchical dataflow graphs used in HPVM, and then focus on on how HPVM is
integrated on top of LLVM. A second part of the talk will briefly describe
how we are extending HPVM to enable greater energy efficiency and
performance by taking advantage of approximation opportunities in
application domains such as machine learning and image processing. To
conclude, I will briefly discuss how HPVM might be added as a dialect in
MLIR so that other MLIR dialects and MLIR-based compilers can use HPVM for
code generation to diverse heterogeneous hardware targets, including GPUs,
FPGAs, and custom accelerators.
TITLE: HPVM: Extending LLVM For Compiling to Heterogeneous Parallel Systems
SPEAKER: Vikram Adve, University of Illinois at Urbana-Champaign
Background
LLVM has been extraordinarily successful as a compiler infrastructure for
enabling a wide range of compilers and compiler-based tools for scalar and
vector processors, and for supporting GPU compilers for OpenCL and CUDA.
LLVM has seen only limited use, however, for other classes of target
architectures, such as reconfigurable hardware (FPGAs) and domain-specific
accelerators such as for machine learning, image processing, signal
processing, graph processing, and other emerging domains. More generally,
heterogeneous system-on-chip (SoC) architectures are becoming increasingly
important, especially in "edge computing," but LLVM has largely been
limited to the host CPU and GPU on such SoCs, even though the number of
other programmable components on these systems has been steadily increasing.
Overview
In this talk, I will describe an extension of LLVM for developing a compiler
infrastructure -- Heterogeneous Parallel Virtual Machine, or HPVM -- for
heterogeneous parallel systems [1]. I will briefly describe at a high-level
the key parallel abstraction of hierarchical dataflow graphs used in HPVM to
describe heterogeneous parallelism, where ordinary LLVM code is used to
represent the computatational tasks. The main focus of this part of the
talk is how HPVM is integrated on top of LLVM. First, HPVM has been
implemented as a set of intrinsic functions that extend the LLVM
infrastructure. Second, the HPVM code generation framework reuses existing
LLVM (and other) back-ends, in order to leverage existing (often well-tuned)
code generators for individual programmable hardware elements, such as NVPTX
for NVIDIA GPUs, Intel's SPIR-V code generator for Intel SSE and AVX vector
hardware, and Altera's AOCL compiler for targeting Altera's FPGAs.
A second part of the talk will briefly describe how we are extending
HPVM to enable greater energy efficiency and performance by taking
advantage of approximation opportunities in application domains such
as machine learning and image processing. In particular, we are
currently developing ApproxHPVM, an extension of HPVM that supports a
range of algorithmic and hardware-level approximation mechanisms [2].
Moreover, ApproxHPVM only requires application programmers to specify
high-level, "end-to-end" design goals such as the maximum allowable
accuracy loss in a neural network or loss of image quality (e.g.,
PSNR) and the system automatically selects, optimizes and maps
approximation choices for individual coarse-grain tensor operations in
the application. The goal is to make sophisticated and well-tested
approximation techniques widely accessible to application developers.
To conclude, I will briefly discuss how HPVM and ApproxHPVM might be added
as a dialect in MLIR so that other MLIR dialects and MLIR-based compilers
can use HPVM for diverse heterogeneous hardware targets, including GPUs,
FPGAs, and custom accelerators.
Target Audience
The intended target audience for this talk falls into broadly two classes.
The first includes compiler practitioners and researchers interested in
compiling to heterogeneous systems, such as SoCs, FPGAs, and other
"edge-compute" hardware. The second includes language implementers
interested in implementing or porting domain-specific languages such as
TensorFlow, Halide, SPIRAL, and others to heterogeneous parallel systems.
Takeaways
We envision several takeaways for the audience: (1) Understand how to
develop an extension of LLVM that makes it easier to target emerging
hardware platforms not sufficiently well-supported by the existing LLVM IR
and code generation framework. (2) Expose attendees to the opportunities and
challenges in supporting and reasoning about approximate computations in a
compiler framework. (3) Discuss the opportunities and limitations of using
HPVM for supporting heterogeneous parallel systems in the context of MLIR.
Web Site and Software Availability
More information about HPVM is available at http://hpvm.cs.illinois.edu/.
The HPVM infrastructure is implemented as an extension to LLVM. To date,
the software is being developed using an internal Git repository at Illinois
and has been shared with collaborators at IBM and at Harvard University.
We will make it available publicly in open-source form on Github before the
FOSDEM conference.
REFERENCES
[1] Maria Kotsifakou, Prakalp Srivastava, Matthew D. Sinclair,
Rakesh Komuravelli, Vikram S. Adve and Sarita V. Adve, “HPVM:
Heterogeneous Parallel Virtual Machine.” Proceedings of Principles and
Practice of Parallel Programming (PPoPP), Feb 2018, Vösendorf / Wien,
Austria.
[2] Hashim Sharif, Prakalp Srivastava, Mohammed Huzaifa, Maria
Kotsifakou, Yasmin Sarita, Nathan Zhou, Keyur Joshi, Vikram S. Adve,
Sasa Misailovic and Sarita V. Adve, “ApproxHPVM: A Portable Compiler
IR for Accuracy-aware Optimizations,” OOPSLA 2019, October 2019,
Athens, Greece.
