We have recreated one of the first modern computers using a low cost FPGA board, Arduinos, 3D printing and simple discrete electronics. Aimed at schools and hobbyists, this open source project allows a new generation to experience the operation of a computer from 1948.
This talk will tell the story of the project, culminating in the three day extravaganza that was ChipHack 2017. I will be demonstrating all the components of the system: the delay line, the 3D printed peripherals and the processor core on FPGA. At the end of this talk, I hope you will understand more about this historic computer and be inspired to build your own EDSAC.
Chip Hack was run as part of the Wuthering Bytes Technology Festival 2017. To celebrate the 60th anniversary of the British computer society, EDSAC was recreated on the myStorm FPGA boards. The Verilog implementation was written by Hatim Kanchwala, a Google Summer of Code student from India. The key EDSAC peripherals were reimagined and interfaced with the FPGA boards.
Sir Prof Maurice Wilkes designed EDSAC and built it with the University of Cambridge. Instead of trying to make the computer the fastest or smallest, he wanted EDSAC to be useable so that everyone at the University could have access to a computer for their research. EDSAC stands for electronic delay storage automatic calculator and was based on EDVAC, a binary stored-program computer.
Punched tape was used to read in the programs. The tape was written using 5-bit wide code. In the reimagined version of EDSAC punched tape was read by reflecting light off of the paper as it was fed through by a motor. The amount of light reflected corresponded to the colour of the tape therefore a hole, substituted for by a black dot, could be found. An extra line of dots down the middle worked as a clock line.
Once the program was completed successfully the output would be sent to a teleprinter, a typewriter like electro-mechanical machine. To simulate this, a thermal printer that was able to communicate with an Arduino was interfaced with myStorm Verilog EDSAC. The thermal printer was also used to print the punched tape.
When EDSAC was turned on, a series of instructions had to be read into the machine. This was error prone and took a very long time to do. To fix this problem, rows of switches were added to the front panel of the computer. This meant that the initial instructions could be boot-strapped in upon start up. Due to the price of toggle switches, the reimagined front panel used two rows of headers and connectors. The bottom row of headers was always positively charged. Each set of headers were connected to an Arduino pin. Therefore, when a header pair was connected the pin is pulled high.
The last peripheral reimagined were the delay lines. These were used as part of EDSAC logic to hold multiple words of information. A short word was 18 bits long and the long word was 36 bits long. Due to problems with the logic system, the last bit for each word was lost and so a short word is usually seen to be 17 bits long and the long word is 35 bits long. To store the word, pipes full of mercury had series of pulses send from the top to the bottom of the tubes. A logic circuit would be able to convert the signal received upon every clock pulse to binary and send it back to the top of the tube to be sent down again.
To simulate the mercury delay lines, a material that was safer and cheaper was used to fill the tubes, air. Similar to the original design, a series of pulses held by a 4 kHz carrier was sent down the tube. An Arduino was able to reassemble to series of pulses at the bottom of the tube and resend the information down the tube. Due to travel issues the tubes had to be short so only a few bits could be held in the tube at any one time.
All materials used were open source because the teaching resource created was designed to be easily used in classrooms and maker spaces. All reimagined peripherals use OpenSCAD and a RepRap 3D printer for the 3D printed components.
Overall, Chip Hack was a great success. Everyone who came learned something about Verilog and enjoyed the talks about the history behind EDSAC. It is quite difficult to get the pacing correct when designing a course for beginner and expert so a lot of people needed to spend extra time on the tutorials.