Programmable devices such as FPGAs can potentially offer very significant computational power, but implementing efficient solutions on them can be a hard task. One
of the main obstacles is the usage of hardware description language (HDL), whose knowledge is usually a rare expertise.
To overcome or at least to mitigate this issue, High Level Synthesis (HLS) has been introduced: a (semi)-automatic design flow, potentially composed of several methodologies, that
starting from a high level representation of the specification to be implemented (e.g., from its C/C++ source code implementation) produces its hardware implementation.
This talk presents Bambu a free HLS tools based on GCC developed at Politecnico di Milano, that generated synthesizable HDL description starting from ANSI specifications.
Programmable devices such as FPGAs can potentially offer very significant computational power, but implementing efficient solutions on them can be a hard task. One
of the main obstacles is the usage of hardware description language (HDL), whose knowledge is usually a rare expertise.
To overcome or at least to mitigate this issue, High Level Synthesis (HLS) has been introduced: a (semi)-automatic design flow, potentially composed of several methodologies, that
starting from a high level representation of the specification to be implemented (e.g., from its C/C++ source code implementation) produces its hardware implementation.
This talk presents Bambu a free HLS tools based on GCC developed at Politecnico di Milano, that generated synthesizable HDL description starting from ANSI specifications.
In particular, Bambu receives as input a behavioral description of the algorithm, written in ANSI C language, and generates a Verilog description of the corresponding RTL implementation as output, along with a test-bench for the simulation and validation of the behavior. This HDL description is then compatible with commercial RTL synthesis tools.
Bambu has a compiler-based interface interacting with the GNU Compiler Collection (GCC) (version 4.5, 4.6, 4.7, 4.8 and 4.9 are currently supported) and builds the internal representation in Static Single Assignment form of the initial C code.
Floating point operations are supported through FloPoCo (http://flopoco.gforge.inria.fr/), a generator of arithmetic Floating-Point Cores or through directly synthesis of a softfloat based C description.
Bambu provides the automatic generation of synthesis and simulation scripts based on XML configuration. This feature allows the automatic characterization of the resource library, providing technology-aware details during the High-Level Synthesis. The tools for RTL-synthesis currently supported are: Xilinx ISE, Xilinx VIVADO, Altera Quartus and Lattice Diamond; and simulation tools: Mentor Modelsim, Xilinx ISIM, Xilinx XSIM, Verilog Icarus and Verilator.