Marek Kasiewicz

There is existing work in the public space on how to correctly construct a DRTM launch but not an equivalent amount on how to maintain the integrity of the DRTM launch over the lifecycle of a system. In particular a specific area of concern is how to correctly construct a secure upgrade for the DRTM launch that minimizes the risk of the process being corrupted. There are a few challenges that must be overcome and in this presentation these will be covered along with a novel approach that will address the challenges.

Other people: Daniel Smith Brian Payne

During that presentation I will run a quick demo of the OSFCI infrastructure which is developed by HPE to validate and build Open Source Firmware stack on Proliant server. I will introduce an overview at how the code works, and how to get involve, and make scale the platform. This project is available on github. https://github.com/hewlettpackard/osfci

OSFCI is an interactive testing platform for Open Source Firmware. From a single web browser, a firmware developer can recompile ROM at BMC and System level, load them to a real system, and execute an interactive session to validate firmware behavior on real hardware. The goal of this infrastructure is to provide end to end validation automation for firmware development, easing adoption for open source firmware at scale.

Other people: Jean-Marie Verdun

This is the continuation of the "Status of AMD platform in coreboot" presented last year on the Open Source Firmware, BMC and Bootloader devroom. The talk will cover the news around the AMD support in Open Source Firmware ecosystem from the past year. You will hear, among others, about: FSF RYF KGPE-D16 platform revival, AMD Ryzen R1000/V1000 series AGESA integration into open source TianoCore EDK2, TrenchBoot new features and updates and current support of AMD Picasso and Cezanne SoCs in coreboot, pure open-source on AMD Rome platform in oreboot.

The history of AMD cooperation in coreboot projects reaches 2007 where the first contribution appeared for the Geode LX processors. AMD's open-source support continued for many years until now (with some break). This presentation will briefly introduce the history of AMD and coreboot, the evolution of the code, processors, creation of CIMX and AGESA and so on. It will also show the gradual change in the AMD attitude to open-source and introduction of binary platform initialization. Binary blobs, very disliked by the open-source community started to cause problems and raised the needs for workarounds to support basic processor features. Soon after that AMD stopped supporting the coreboot community. Moreover, recent coreboot releases started to enforce certain requirements on the features supported by the silicon code base. Aging platforms kept losing interest and many of them (including fully open ones) are being dropped from the main tree. Nowadays AMD released the newest AGESA with the cooperation of hired coreboot developers, but only for Google and their Chromebooks based on Ryzen processors. 3mdeb trying hard with this ecosystem showing that the AGESA can be integrated into Open Source Firmware like TianoCore EDK2 on the example of AMD Ryzen R1000/V1000 processor. Even FSF RYF KGPE-D16 platform is experiencing its second youth by being revived to the main coreboot tree. If you are curious about these activities and many more like TrenchBoot new features or AMD Picasso an Cezanne SoC support in coreboot, pure open-source on AMD Rome in oreboot, this presentation is for you.

Other people: Piotr Król