Alistair Francis

The reMarkable 2 is an eInk tablet, based on the i.MX7 SoC. The tablet ships with a fork of the 4.14 kernel and a custom rootFS built with OpenEmbedded. The vendor kernel is based on the NXP vendor kernel with a large collection of rM2 specific patches on top.

This talk discusses the process of adding support for the rM2 to the mainline Linux kernel. The talk first discusses the process of understanding the original boot process and then getting access to a download mechanism and serial console.

Finally the talk covers the process to start upstreaming the patches from a vendor kernel to the mainline kernel.

The open RISC-V Instruction Set Architecture (ISA) has been growing for the last few years and the momentum behind it is impressive. That does not mean there are no areas that can be improved. For instance, until recently, a major weakness in the RISC-V software ecosystem was the boot loader support. A well-supported and standard boot flow is required before RISC-V can be a truly competitive alternative to existing mainstream ISAs. By focusing on using common open source projects, RISC-V can follow the same boot flow as other popular ISAs, allowing RISC-V to build on past experiences with booting complex systems on various environments. Although RISC-V is leveraging existing projects as much as possible, RISC-V also needs its own trusted firmware to handle RISC-V specific features such as Supervisor Binary Interface (SBI). SBI allows the operating system to interact with the supervisor execution environment (SEE). This requires a separate but modular open source SBI implementation that provides RISC-V specific run time services. OpenSBI is a BSD-2 licensed project. It is designed in such a way that other open source firmware and bootloaders such as U-Boot, coreboot and EDK2 can easily integrate with OpenSBI and do not require their own separate SBI implementation. This avoids implementation duplication with a common open source SBI implementation. Currently the RISC-V boot process is functional with U-Boot being used as the last stage boot loader and OpenSBI as the machine mode run time service provider. There is also an on-going effort to port U-Boot and coreboot as a first stage boot loader, a step necessary to provide more advanced boot flows including secure boot. This paper will discuss how the RISC-V boot process compares to other ISAs and where the community is heading. This will give developers more insight into how the RISC-V boot process works and how they can contribute to improve the RISC-V

Other people: Atish Patra